pin description symbol pin function a0~a20 address inputs d0~d14 data outputs d15/a-1 d15 (word mode)/ lsb address (byte mode) ce chip enable input oe output enable input byte word/ byte mode selection vcc power supply pin vss ground pin nc no connection 1 p/n:pm0411 rev. 3.0, nov. 07, 2006 32m-bit mask rom (8/16-bit output) features ? bit organization - 4m x 8 (byte mode) - 2m x 16 (word mode) fast access time - random access: 70ns (max.) - page access: 25ns (max.) page size - 8 words per page order information part no. access time page access time package remark mx23l3211mc-70 70ns 25ns 44 pin sop mx23l3211mc-90 90ns 25ns 44 pin sop mx23l3211mc-10 100ns 30ns 44 pin sop mx23l3211mc-12 120ns 50ns 44 pin sop mx23l3211mc-10g 100ns 30ns 44 pin sop pb-free mx23l3211mc-12g 120ns 50ns 44 pin sop pb-free MX23L3211TC-90 90ns 25ns 48 pin tsop mx23l3211tc-10 100ns 30ns 48 pin tsop mx23l3211tc-12 120ns 50ns 48 pin tsop mx23l3211tc-10g 100ns 30ns 48 pin tsop pb-free mx23l3211tc-12g 120ns 50ns 48 pin tsop pb-free mx23l3211rc-90 90ns 25ns 48 pin tsop(reverse type) mx23l3211rc-10 100ns 30ns 48 pin tsop(reverse type) mx23l3211rc-12 120ns 50ns 48 pin tsop(reverse type) pin configuration 44 sop mx23l3211 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 nc a18 a17 a7 a6 a5 a4 a3 a2 a1 a0 ce/ce vss oe/oe d0 d8 d1 d9 d2 d10 d3 d11 a20 a19 a8 a9 a10 a11 a12 a13 a14 a15 a16 byte vss d15/a1 d7 d14 d6 d13 d5 d12 d4 vcc mx23l3211 current - operating:40ma - standby:5ua supply voltage - 3.0v ~ 3.6v for 90ns and 70ns speed grades - 2.7v ~ 3.6v for 100ns and 120ns speed grades package - 44 pin sop (500mil) - 48 pin tsop (12mm x 20mm)
2 p/n:pm0411 rev. 3.0, nov. 07, 2006 mx23l3211 48 tsop (normal type) 48 tsop (reverse type) byte a16 a15 a14 a13 a12 a11 a10 a9 a8 a19 vss a20 a18 a17 a7 a6 a5 a4 a3 a2 a1 a0 ce 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 vss vss d15/a-1 d7 d14 d6 d13 d5 d12 d4 vcc vcc nc d11 d3 d10 d2 d9 d1 d8 d0 oe vss vss 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 mx23l3211 (normal type) byte a16 a15 a14 a13 a12 a11 a10 a9 a8 a19 vss a20 a18 a17 a7 a6 a5 a4 a3 a2 a1 a0 ce 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 vss vss d15/a-1 d7 d14 d6 d13 d5 d12 d4 vcc vcc nc d11 d3 d10 d2 d9 d1 d8 d0 oe vss vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 mx23l3211 (reverse tpye) mode selection ce oe byte d15/a-1 d0~d7 d8~d15 mode power h x x x high z high z - stand-by l h x x high z high z - active l l h output d0~d7 d8~d15 word active l l l input d0~d7 high z byte active
3 p/n:pm0411 rev. 3.0, nov. 07, 2006 mx23l3211 absolute maximum ratings item symbol ratings supply voltage relative to vss vcc -0.3v to 4.3v voltage on any pin relative to vss vin -0.5v to vcc + 2.0v ambient operating temperature topr 0 c to 70 c storage temperature tstg -65 c to 125 c block diagram dc characteristics (ta = 0 c ~ 70 c, vcc = 2.7v~3.6v) item symbol min. max. conditions output high voltage voh 2.4v - ioh = -400ua output low voltage vol - 0.4v iol = 1.6ma input high voltage vih 2.2v vcc+0.3v input low voltage vil -0.3v 0.8v input leakage current ili - 5ua 0v, vcc output leakage current ilo - 5ua 0v, vcc operating current icc1 - 40ma trc = 100ns, all output open standby current (ttl) istb1 - 1ma ce = vih standby current (cmos) istb2 - 5ua ce>vcc-0.2v input capacitance cin - 10pf ta = 25 c, f = 1mhz output capacitance cout - 10pf ta = 25 c, f = 1mhz address buffer memory array page buffer page decoder word/ byte output buffer d0 d15/(d7) a3 a20 a0/(a-1) a2 ce byte oe
4 p/n:pm0411 rev. 3.0, nov. 07, 2006 mx23l3211 ac characteristics (ta = 0 c ~ 70 c, vcc =2.7v~3.6v) item symbol 23l3211-70* 23l3211-90 23l3211-10 23l3211-12 min. max. min. max. min. max. min. max. read cycle time trc 70ns - 90ns - 100ns - 120ns - address access time taa - 70ns - 90ns - 100ns - 120ns chip enable access time tace - 70ns - 90ns - 100ns - 120ns page mode access time tpa - 25ns - 25ns - 30ns - 50ns output enable time toe - 25ns - 25ns - 30ns - 50ns output hold after address toh 0ns - 0ns - 0ns - 0ns - output high z delay thz* - 20ns - 20ns - 20ns - 20ns ac test conditions input pulse levels 0.4v~ 2.6v input rise and fall times 10ns input timing level 1.4v output timing level 1.4v output load see figure note: no output loading is present in tester load board. active loading is used and under software programming control. output loading capacitance includes load board's and all stray capacitance. dout c<100pf iol (load)=1.6ma ioh (load)=-0.4ma note: 1. output high-impedance delay (thz) is measured from oe or ce going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested. 2. for 70ns speed grade, the vcc range is 3.0~3.6v, operating temperature 0~55 c, and output load is 30pf.
5 p/n:pm0411 rev. 3.0, nov. 07, 2006 mx23l3211 timing diagram random read page read tace taa toh thz add add add add ce oe data valid valid valid trc toe a3-a20 (a-1),a0,a1,a2 data note: ce, oe are enable. page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode. valid add valid 1'st add 2'nd add tpa taa 3'rd add valid valid
6 p/n:pm0411 rev. 3.0, nov. 07, 2006 mx23l3211 package information
7 p/n:pm0411 rev. 3.0, nov. 07, 2006 mx23l3211
8 p/n:pm0411 rev. 3.0, nov. 07, 2006 mx23l3211
9 p/n:pm0411 rev. 3.0, nov. 07, 2006 mx23l3211 revision history revision description page date 2.0 output hold after address (toh) spec is revised as 0ns(min.) p4 jan/22/1999 120ns speed grade's voltage range is revised as 2.7v~3.6v p1 2.1 modify package information p6~7 jul/17/2001 2.2 1. add supply voltage relative to vss p3 jul/25/2002 2. change voltage on any pin relative to vss:-0.5v to vcc+2.0 p3 2.3 1. supply voltage change to 2.7v ~ 3.6v p1 jul/26/2002 2.4 1. modify vin : -0.5v to vcc + 2v --> -0.5v to vcc + 2.0v p3 aug/21/2002 2. add 48-tsop reverse type package information p8 2.5 to modify package information p6~8 nov/21/2002 2.6 1. add access time:70ns, 90ns p1,4 jan/20/2003 2.7 1. add mx23l3211mc-90 in order information p1 jan/22/2003 2.8 1. modify timing diagram--page read p5 jan/23/2003 2.9 1. add pb-free package in order information p1 may/11/2004 3.0 1. added statement p10 no v/07/2006
mx23l3211 10 m acronix i nternational c o., l td . headquarters macronix, int'l co., ltd. 16, li-hsin road, science park, hsinchu, taiwan, r.o.c. tel: +886-3-5786688 fax: +886-3-5632888 macronix america, inc. 680 north mccarthy blvd. milpitas, ca 95035, u.s.a. tel: +1-408-262-8887 fax: +1-408-262-8810 email: sales.northamerica@macronix.com macronix japan cayman islands ltd. nkf bldg. 5f, 1-2 higashida-cho, kawasaki-ku kawasaki-shi, kanagawa pref. 210-0005, japan tel: +81-44-246-9100 fax: +81-44-246-9105 macronix (hong kong) co., limited. 702-703, 7/f, building 9, hong kong science park, 5 science park west avenue, sha tin, n.t. tel: +86-852-2607-4289 fax: +86-852-2607-4229 http : //www.macronix.com macronix international co., ltd. reserves the right to change product and specifications without notice. taipei office macronix, int'l co., ltd. 19f, 4, min-chuan e. road, sec. 3, taipei, taiwan, r.o.c. tel: +886-2-2509-3300 fax: +886-2-2509-2200 macronix europe n.v. koningin astridlaan 59, bus 1 1780 wemmel belgium tel: +32-2-456-8020 fax: +32-2-456-8021 singapore office macronix pte. ltd. 1 marine parade central #11-03 parkway centre singapore 449408 tel: +65-6346-5505 fax: +65-6348-8096 macronix's products are not designed, manufactured, or intended for use for any high risk applications in which the failure of a single component could cause death, personal injury, severe physical damage, or other substantial harm to persons or property, such as life-support systems, high temperature automotive, medical, aircraft and military application. macronix and its suppliers will not be liable to you and/or any third party for any claims, injuries or damages that may be incurred due to use of macronix's products in the prohibited applications.
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